TSMC added an N5P process and more details on advanced packages to its roadmap for squeezing advances from silicon at a smaller and smaller scale.
At the bleeding edge, picking a path forward among expanding 7, 7+, 6, 5, and 5+ options is increasingly complex. “The good news is we continue to see scaling for the foreseeable future,” Yuh-Jier Mii, a senior vice president for technology development for TSMC, told an audience of about 2,000 attendees.
For more, check out this EE Times story.